cystech electronics corp. spec. no. : c521j3 issued date : 2007.10.23 revised date : 2013.04.23 page no. : 1/7 LM7805BJ3 cystek product specification three terminal positive voltage regulators LM7805BJ3 to-252(dpak) i g o description the LM7805BJ3 series of fixed voltage monolithic integrated circuit voltage regulators is designed for a wide range of applications. these applications include on-card regulation for eliminatio n of noise and distribution problems associated with single point regulation. each of these regulators can deliver up to 1a of output current. the internal current limiting and thermal s hutdown features of these regulators make them essentially immune to overload. features: ? internal short-circuit current limiting ? high power dissipation capability ? internal thermal overload protection ? no external components required ? output transistor safe area compensation ? pb-free lead plating absolute maximum ratings (ta=25 c) parameter ratings unit input voltage 35 v output current 1 a operating junction temperature range -40 ~ +125 storage temperature range -55 ~ +125 thermal resistance, junction to ambient (r ja ) 125 /w thermal resistance, junction to case (r jc ) 12.5 /w ordering information device output voltage tolerance package shipping marking LM7805BJ3 5% to-252 (pb-free lead plating) 2500 pcs / tape & reel 7805
cystech electronics corp. spec. no. : c521j3 issued date : 2007.10.23 revised date : 2013.04.23 page no. : 2/7 LM7805BJ3 cystek product specification typical application circuit block diagram vout vin c1 c2 note: c1 and c2 are required if regulator is located far from power supply filter and load, or oscillation may induced on the loop. lm7805b 1 2 3 0.33 f 0.1 f
cystech electronics corp. spec. no. : c521j3 issued date : 2007.10.23 revised date : 2013.04.23 page no. : 3/7 LM7805BJ3 cystek product specification electrical characteristics (tj=0~125 c, vin=10v, io=500ma, cin=0.33uf, cout=0.1uf, unless otherwise noted) symbol parameter min typ max conditions units v o output voltage 4.75 - 5.25 vin=10v, io=500ma,tj=25 c 7.5v vin 20v, 5ma io 1a, pd 15w v - 3 50 7v vin 25v, tj=25 c vo line regulation - 1 25 8v vin 12v, tj=25 c mv - - 100 5ma io 1a, tj=25 c vo load regulation - - 50 250ma io 750ma, tj=25 c mv iq quiescent current - - 8 vin=10v, io=500ma, tj=25 c ma - - 0.5 5ma io 1a iq quiescent current change - - 1.3 7v vin 25v ma vn output noise voltage - 40 - 10hz f 100khz, tj=25 c v rr ripple rejection - 80 - 8v vin 18v, f=120hz, tj=25 c db vd dropout voltage - 2 - io=1a, tj=25 c v isc output short circuit current - 250 - vin=35v, tj=25 c ma ipk peak output current - 1.8 - tj=25 c a vo / tj temperature stability - -0.6 - mv/ io=5ma, 0 c tj 125 c recommended soldering footprint
cystech electronics corp. spec. no. : c521j3 issued date : 2007.10.23 revised date : 2013.04.23 page no. : 4/7 LM7805BJ3 cystek product specification characteristic curves
cystech electronics corp. spec. no. : c521j3 issued date : 2007.10.23 revised date : 2013.04.23 page no. : 5/7 LM7805BJ3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c521j3 issued date : 2007.10.23 revised date : 2013.04.23 page no. : 6/7 LM7805BJ3 cystek product specification recommended wave soldering condition peak temperature soldering time product pb-free devices 5 +1/-1 seconds 260 +0/-5 c recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak 10-30 seconds 20-40 seconds temperature(tp) ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c521j3 issued date : 2007.10.23 revised date : 2013.04.23 page no. : 7/7 LM7805BJ3 cystek product specification to-252(dpak) dimension inches millimeters inches millimeters dim min. max. min. max. marking: 1 2 3 4 month code : 7805 device name date code : 1 st code : year code, 1 2011, 2 2012, ?,etc 2 nd code : month code, referring to the following table 3 rd and 4 th codes : production lot serial number : 01, 02, 03,?,etc. month jan feb mar apr may jun jul aug sep oct nov dec code a b c d e f g h j k l m 3-lead to-252(dpak) plastic surface mount package style: pin 1.vin 2.ground 3.vout 4.ground cystek package code: j3 dim min. max. min. max. a 0.087 0.094 2.200 2.400 e 0.086 0.094 2.186 2.386 a1 0.000 0.005 0.000 0.127 e1 0.172 0.188 4.372 4.772 b 0.039 0.048 0.990 1.210 h 0.163 ref 4.140 ref b 0.026 0.034 0.660 0.860 k 0.190 ref 4.830 ref b1 0.026 0.034 0.660 0.860 l 0.386 0.409 9.800 10.400 c 0.018 0.023 0.460 0.580 l1 0.114 ref 2.900 ref c1 0.018 0.023 0.460 0.580 l2 0.055 0.067 1.400 1.700 d 0.256 0.264 6.500 6.700 l3 0.024 0.039 0.600 1.000 d1 0.201 0.215 5.100 5.460 p 0.026 ref 0.650 ref e 0.236 0.244 6.000 6.200 v 0.211 ref 5.350 ref notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead : pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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